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Compiling Path Expressions into VLSI Circuits

Anantharaman, T. S.; Clarke, E. M.; Foster, M. J.; Mishra, B.

Path expressions were originally proposed by Campbell and Haberman [2] as a mechanism for process synchronization at the monitor level in software.. Not unexpectedly, they also provided notation for specifying the behavior of asynchronous circuits. Motivated by these potential applications, we investigate how to directly translate path expressions into hardware. Our implementation is complicated in the case of multiple path expressions by the need for synchronization on event names that are common to more than one path. However, since events are inherently asynchronous in our model, all of our circuits must be self-timed. Nevertheless, the circuits produced by our construction have area proportional to N*log(N) where N is the total length of the multiple path expression under consideration. This bound holds regardless of the number of individual paths or the degree of synchronization between paths. Furthermore, if the structure of the path expression allows partitioning. the circuit can be layed out in a distributed fashion without additional area overhead.

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Academic Units
Computer Science
Publisher
Department of Computer Science, Columbia University
Series
Columbia University Computer Science Technical Reports, CUCS-166B-85
Published Here
August 7, 2013