1996 Reports
Concurrency-Oriented Optimization for Low-Power Asynchronous Systems
We introduce new architectural optimizations for asynchronous systems. These optimizations allow application of voltage scaling, to reduce power consumption while maintaining system throughput. In particular, three new asynchronous sequencer designs are introduced, which increase the concurrent activity of the system.We show that existing datapaths will not work correctly at the increased level of concurrency. To insure correct operation, modified latch and multiplexer designs are presented, for both dual-rail and single-rail implementations. The increased concurrency allows the opportunity for substantial system-wide power savings through application of voltage scaling.
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demo title for ac:110239 application/octet-stream 145 KB Download File
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cucs-017-96.pdf application/pdf 300 KB Download File
More About This Work
- Academic Units
- Computer Science
- Publisher
- Department of Computer Science, Columbia University
- Series
- Columbia University Computer Science Technical Reports, CUCS-017-96
- Published Here
- April 25, 2011