Challenges in Synthesizing Fast Control-Dominated Circuits

Soviani, Cristian; Edwards, Stephen A.

Presenting designers with higher-level specification languages is one sure way to improve productivity, but the more abstract the language, the higher the compiler's optimization burden. We consider generating efficient controller circuits from descriptions written in Esterel. To understand the demands of scalable optimization algorithms, we manually matched the results from sequential synthesis algorithms that produce good circuits but are costly or impossible to run on large designs. We hoped the high-level structure of Esterel would suggest inexpensive, effective optimizations, but our results are mixed. In the five examples we considered, many optimizations clearly could be automated cheaply, but we needed more global information to match the quality of the existing automatic techniques. This suggests an effective solution would have to combine both local and (potentially costly) global techniques.



  • thumnail for soviani2005challenges.pdf soviani2005challenges.pdf application/pdf 77.6 KB Download File

Also Published In

Proceedings of the 14th International Workshop on Logic and Synthesis, June 8-10, 2005, Lake Arrowhead, Calif.

More About This Work

Academic Units
Computer Science
Published Here
March 8, 2012