2006 Articles

Synthesis of High-Performance Packet Processing Pipelines

Soviani, Cristian; Hadzic, Ilija; Edwards, Stephen A.

Packet editing is a fundamental building block of data communication systems such as switches and routers. Circuits that implement this function are critical and define the features of the system. We propose a high-level synthesis technique for a new model for representing packet editing functions. Experiments show our circuits achieve a throughput of up to 40Gb/s on a commercially available FPGA device, equal to state-of-the-art implementations.