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From Functional Programs to Pipelined Dataflow Circuits

Townsend, Richard Morse; Kim, Martha Allen; Edwards, Stephen A.

We present a translation from programs expressed in a functional IR into dataflow networks as an intermediate step within a Haskell-to-Hardware compiler. Our networks exploit pipeline parallelism, particularly across multiple tail-recursive calls, via non-strict function evaluation. To handle the long-latency memory operations common to our target applications, we employ a latency-insensitive methodology that ensures arbitrary delays do not change the functionality of the circuit. We present empirical results comparing our networks against their strict counterparts, showing that nonstrictness can mitigate small increases in memory latency and improve overall performance by up to 2x.

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Title
Proceedings of the 26th International Conference on Compiler Construction
DOI
https://doi.org/10.1145/3033019.3033027

More About This Work

Academic Units
Computer Science
Publisher
Association for Computing Machinery
Published Here
June 5, 2017
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