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Performance Analysis of Two Competing DADO PE Designs

Miranker, Daniel P.

In parallel processing, useful computation is performed by having a number or processors computing values and communicating these results to neighboring processors. It is a crucial design issue in any parallel processing architecture to determine the optimal balance or resources for competing requirements of typical problems to be solved by the device, i.e. computation versus communication. For example, in a highly parallel machine consisting of many individual processing elements (PE's), there is a trade ofr between the complexity of the constituent PE's and the number of such elements which may be embedded in a fixed silicon area. Part or the PE's circuitry must be dedicated to communication processing. Increasing the ability and the speed at which a PE can perform communication can be done, but only at the expense or the number of processors on a chip. DADO is a large scale VLSI computer designed for the rapid execution of AI production systems. This paper analyses the nature of the instruction stream expected to be executed on DADO for production system applications, with emphasis placed on the number or processors in the machine and the size of the problem. We describe four different proposed methods of handling I/O and their queueing network models. The models were carefully simulated to determine which I/O scheme and its resulting circuit complexity is best suited (most efficient) with respect to the DADO instruction stream.

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Academic Units
Computer Science
Publisher
Department of Computer Science, Columbia University
Series
Columbia University Computer Science Technical Reports, CUCS-083-83
Published Here
October 26, 2011
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