Hardware-Accelerated Range Partitioning
Wu
Lisa K.
author
Columbia University. Computer Science
Barker
Raymond John
author
Columbia University. Electrical Engineering
Kim
Martha Allen
author
Columbia University. Computer Science
Ross
Kenneth A.
author
Columbia University. Computer Science
Columbia University. Computer Science
originator
contributor
text
Technical reports
New York
Department of Computer Science, Columbia University
2012
With global pool of data growing at over 2.5 quinitillion bytes per day and over 90% of all data in existence created in the last two years alone, there can be little doubt that we have entered the big data era. This trend has brought database performance to the forefront of high throughput, low energy system design. This paper explores targeted deployment of hardware accelerators to improve the throughput and efficiency of database processing. Partitioning, a critical operation when manipulating large data sets, is often the limiting factor in database performance, and represents a significant amount of the overall runtime of database processing workloads. This paper describes a hardware-software streaming framework and a hardware accelerator for range partitioning, or HARP. The streaming framework offers seamless execution environment for database processing elements such as HARP. HARP offers performance, as well as orders of magnitude gains in power and area efficiency. A detailed analysis of a 32nm physical design shows 9.3 times the throughput of a highly optimized and optimistic software implementation, while consuming just 3.6% of the area and 2.6% of the power of a single Xeon core in the same technology generation.
Computer science
Columbia University Computer Science Technical Reports
CUCS-014-12
http://hdl.handle.net/10022/AC:P:14724
English
NNC
NNC
2012-09-20 12:39:34 -0400
2012-09-20 13:01:04 -0400
8745
eng